得到未定义的符号错误,甚至认为变量是语法定义的

时间:2013-06-21 05:43:56

标签: vhdl

architecture beh of pwm is 
begin
type lutable is array (1 to 64) of integer range 0 to 4000;
-----------------------------------------------tables for FULL STEPPING.
constant full_pwm1_1: lutable := (  3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  
                                            3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  
                                            3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  
                                            3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900);
variable ds1_1: integer range 0 to 4000;        --Duty Cycle Variables for PWM1_1
variable c_full,c_half,c_quat,c_eigh,c_sixt: integer range 1 to 64;

process(gclk)
begin
case selectline is 
when "001" =>                    --------------------FULL STEPPING
            if dir='1' then--------------------direction selection
                    ds1_1 := full_pwm1_1(c_full);

我没有提到的所有其他变量都被定义为整数,具有适当的范围,并且都是语法定义的。

但我得到了所有这些的“未定义符号”错误,而且full_pwm1_1也是常量。  如果有人可以帮助我,还要验证数组声明和实例化是否正确?

2 个答案:

答案 0 :(得分:1)

在“架构”行和“开始”行之间写入类型和常量声明,例如:

architecture beh of pwm is 
   type lutable is array (1 to 64) of integer range 0 to 4000;
   constant full_pwm1_1: lutable := (  3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  
                                        3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  
                                        3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  
                                        3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900,  3900,0,0,3900);

   ...
begin

   ...

在“process”和“begin”之间写入变量声明,例如

process(gclk)    
    variable ds1_1: integer range 0 to 4000;        --Duty Cycle Variables for PWM1_1
    variable c_full,c_half,c_quat,c_eigh,c_sixt: integer range 1 to 64;
begin
    ...

或将ds1_1等声明为信号,例如:

...
   signal ds1_1: integer range 0 to 4000;        --Duty Cycle Variables for PWM1_1
   signal c_full,c_half,c_quat,c_eigh,c_sixt: integer range 1 to 64;
...
begin
    ...
    process(gclk)
       ...

答案 1 :(得分:1)

您的类型和常量声明必须在architecture之后和begin之前。

此外,您不能在此部分中包含变量 - 它们必须是

  • 普通变量,在process
  • 共享变量...必须是protected类型,而不是普通类型