我对CUDA编程指南4.0第5.3.2.1节中的以下陈述感到困惑 在“绩效指南”一章中。
Global memory resides in device memory and device memory is accessed
via 32-, 64-, or 128-byte memory transactions.
These memory transactions must be naturally aligned:Only the 32-, 64- ,
128- byte segments of device memory
that are aligned to their size (i.e. whose first address is a
multiple of their size) can be read or written by memory
transactions.
1)
我对设备内存的理解是,线程对设备内存的访问是未缓存的:因此,如果线程访问内存位置a[i]
,它将仅获取a[i]
而不会获取
a[i]
附近的值。所以第一个声明似乎与此相矛盾。或许我在这里误解了“记忆交易”一词的用法?
2)第二句似乎不太清楚。有人可以解释一下吗?
答案 0 :(得分:4)