Question

当我尝试运行以下make文件时（根据以下建议更新）：

# Build Directories
src_dir=src
obj_dir=obj
bin_dir=bin

cc=cl
cc_flags=

configs = dbg rel

# create the directory for the current target.
dir_guard=@mkdir -p $(@D)

# source files
src = MainTest.cpp

define build_template = 
# object files - replace .cpp on source files with .o and add the temp directory prefix
obj_$(1) = $$(addprefix $$(obj_dir)/$(1)/, $$(addsuffix .obj, $$(basename $$(src))))

testVar = "wooo"

# build TwoDee.exe from all of the object files.
$$(bin_dir)/$(1)/MainTest.exe : $$(obj_$(1))
    $$(dir_guard)
    $$(cc) -out:$$@ $$(obj_$(1)) -link

# build all of the object files in the temp directory from their corresponding cpp files.
$$(obj): $$(obj_dir)/$(1)/%.obj : $$(src_dir)/%.cpp
    $$(dir_guard)
    $$(cc) $$(cc_flags) -Fo$$(obj_dir)/$$(1) -c $$<
endef

$(foreach cfg_dir,$(configs),$(eval $(call build_template,$(cfg_dir))))

release: $(bin_dir)/rel/MainTest.exe

debug: cc_flags += -Yd -ZI
debug: $(bin_dir)/dbg/MainTest.exe

$(warning testVar $(testVar))

我得到的只是：

$ make
Makefile:41: testVar
make: *** No rule to make target `bin/rel/MainTest.exe', needed by `release'.  Stop.

您可以从输出中看到从未设置过testVar变量。我根据上一个问题进行了这些更改：Why doesn't my makefile target-specific variable work?

Answer 1

有一些空间会混淆Make。试试这个：

$(foreach cfg_dir,$(configs),$(eval $(call build_template,$(cfg_dir))))

还要确保指定要链接的正确对象：

    $$(cc) -out:$$@ $$(obj_$(1)) -link

正如@Beta在下面的评论中指出的那样，模板定义语法中的=需要GNU make 3.82或更高版本。所以最好省略它：

define build_template

为什么我的Makefile中的eval函数不起作用？

1 个答案: