如何避免Makefile中重复的隐式规则?

时间:2012-01-13 15:00:54

标签: makefile

我正在研究一个Makefile自动生成软件(CodeMate),我想知道我是否可以避免为不同的文件写入隐式规则,但操作与:

%.o: %.F90
    @echo " Creating dependency $@"
    @echo $(seperator)
    @$(FORTRAN_COMPILER) -c $< $(OPTION) $(FORTRAN_FLAGS) $(INCLUDES)
%.o: %.f90
    @echo " Creating dependency $@"
    @echo $(seperator)
    @$(FORTRAN_COMPILER) -c $< $(OPTION) $(FORTRAN_FLAGS) $(INCLUDES)
%.o: %.F
    @echo " Creating dependency $@"
    @echo $(seperator)
    @$(FORTRAN_COMPILER) -c $< $(OPTION) $(FORTRAN_FLAGS) $(INCLUDES)
%.o: %.f
    @echo " Creating dependency $@"
    @echo $(seperator)
    @$(FORTRAN_COMPILER) -c $< $(OPTION) $(FORTRAN_FLAGS) $(INCLUDES)

这可以很好用,但有点难看。

谢谢!

1 个答案:

答案 0 :(得分:1)

(未测试:)

define f_rule
%.o: %.$(1)
    @echo " Creating dependency $$@"
    @echo $(seperator)
    @$(FORTRAN_COMPILER) -c $$< $(OPTION) $(FORTRAN_FLAGS) $(INCLUDES)
endef

F_EXTENSIONS := F90 f90 F f
$(foreach ext, $(F_EXTENSIONS), $(eval $(call f_rule,$(ext))))