我学会了两种编写订阅者的设计模式:
1)从uvm_subscriber
派生,覆盖write
函数,然后通过内置分析端口调用该函数
2)派生自uvm_component
,安装uvm_analysis_export
和uvm_tlm_analysis_fifo
,连接它们并在run_phase
我想知道以下内容。如果 派生自uvm_subscriber
,而是uvm_component
,请安装uvm_analysis_export
并编写write
函数,该函数将被调用相应端口的uvm_analysis_export
,如何将uvm_analysis_export
与write
连接起来?它有可能吗?
答案 0 :(得分:1)
无法将uvm_analysis_export
与write
"联系起来。相反,您需要从uvm_component
派生,安装uvm_analysis_imp
(imp
而不是export
)并撰写write
函数。
imp
是端点; (使用订户模式)就是调用write
方法。 export
是航路点;它只能连接到其他export
或imp
。
如果我们查看uvm_subscriber
类的源代码,我们可以看到如何执行此操作:
virtual class uvm_subscriber #(type T=int) extends uvm_component;
typedef uvm_subscriber #(T) this_type;
// Port: analysis_export
//
// This export provides access to the write method, which derived subscribers
// must implement.
uvm_analysis_imp #(T, this_type) analysis_export;
// Function: new
//
// Creates and initializes an instance of this class using the normal
// constructor arguments for <uvm_component>: ~name~ is the name of the
// instance, and ~parent~ is the handle to the hierarchical parent, if any.
function new (string name, uvm_component parent);
super.new(name, parent);
analysis_export = new("analysis_imp", this);
endfunction
// Function: write
//
// A pure virtual method that must be defined in each subclass. Access
// to this method by outside components should be done via the
// analysis_export.
pure virtual function void write(T t);
endclass
我不太清楚你为什么要这样做,因为正如你所看到的,你只是在uvm_subscriber
重写已经为你做过的事情。 。我想通过问你已经学到的东西,我已经刷新了一些回答它的知识。