如何在Makefile中设置创建文件的文件夹?

时间:2016-10-27 10:44:50

标签: makefile gnu-make

我的项目有条理,所有代码文件都在子目录code/中找到。我有两个Makefile,一个在主目录中,另一个在code/子目录中。

主目录中的Makefile包含(that post的道具):

# .PHONY rule means that project_code is not a file that needs to be built
.PHONY: project_code

project_code:
    $(MAKE) -C $(CODE_DIR)

clean:
    $(MAKE) -C $(CODE_DIR) clean

all: exe

code/子目录中的Makefile包含以下内容:

exe: $(OBJECTS)
    $(CC) $(CFLAGS) -o $@ $^ -fopenmp -lpng

%.o: %.c
    $(CC) $(CFLAGS) -c $< 

当我现在从主目录运行make时,exe子目录中创建了code/文件,但我想将它放在主目录中。我的问题:我怎样才能做到这一点?

1 个答案:

答案 0 :(得分:1)

请提供此示例:

#Name of outpu binary (exe) file;
PROGRAM_NAME := prog

# project dirs
export SRC_DIRS     := ./src1 ./src2
export INCLUDE_DIRS := ./include

#list of source files (with whitespace between them)
SRC_FILES := $(foreach dirname, $(SRC_DIRS), $(wildcard $(dirname)/*.c))

#Object files
OBJ_FILES := $(foreach filename, $(SRC_FILES), $(filename:.c=.o))

# Include flags
LOCAL_INCLUDES=$(foreach dirs, $(INCLUDE_DIRS), -I$(dirs))


# list of lib-flags for compiler. For example for math.h use    -lm
#LIB_FLAGS=-lm
CC=gcc
CFLAGS=-Wall $(LIB_FLAGS) $(LOCAL_INCLUDES)

#build executable file
$(PROGRAM_NAME): $(OBJ_FILES)
        @echo "Build executable"
        @$(CC) $(CFLAGS) -o $@ $^

# compile all object file
%.o: %.c
        @echo "Compile $(notdir $<)"
        @$(CC) -c $(CFLAGS) $< -o $@

#clean all
clean:
        @rm -f $(OBJ_FILES) $(PROGRAM_NAME)

它只有1个Makefile。它从列出的目录中获取源,在相同目录中创建对象,然后链接到当前(顶部)目录中的二进制文件