Array of IO in Xilinx constraints file [VHDL Spartan-6]

时间:2015-10-30 23:39:12

标签: io vhdl fpga xilinx spartan

I'm learning to program both VHDL and to attempt to implement it on an FPGA (Xilinx Spartan-6 Evaluation Board). So far I have looked at the "getting started" guide here which is useless - as it just shows me how great the potential of an FPGA is if you know what you're doing (which I dont). I've then watched the youtube video to make an LED blink through original VHDL code, constraint file and finally programming it through iMPACT/JTAG. So I've taken it further and made a button that turns the LED on when held down which has also worked, however of my vector of LED's that turn on when I press the button, I have to declare their pin locations for each index, as below; NET "LED(0)" LOC = "D17"; NET "LED(1)" LOC = "AB4"; NET "LED(2)" LOC = "D21"; NET "LED(3)" LOC = "W15"; NET "CLK" LOC = "K21"; NET "BUTTON" LOC = "F3"; How do I declare the entire array of LED(0) to LED(3) in one line? There must be another way given how large a std_logic_vector can be. As a follow up question, if anybody knows of any resources, tutorials, videos or even books that can help me with the basics of actually programming a Spartan-6 (or equivalent) FPGA from a novice level, that would be massively appreciated! Many thanks! David

1 个答案:

答案 0 :(得分:3)

Xilinx UCF文件支持*?等占位符。但不幸的是,引脚位置没有顺序或模式,因此您只能逐个分配它们。

我们的PoC-Library尝试通过提供具有有意义信号名称的即用型UCF文件来最小化最终用户的工作。可以将多个UCF文件加载到一个项目中。

这是Virtex-5 example。还有Vivado工具链的XDC文件。