我在VHDL中有这段代码。当我尝试编译它时 - 它说“门控时钟网络clock_en来自组合引脚”。有谁知道如何摆脱这个警告? 我在互联网上搜索过,无法找到解决方案。似乎门控时钟有时甚至是有用的,但在设计硬件时它是一个警告。
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
use IEEE.std_logic_arith.all;
entity ledc8x8 is
port(
SMCLK: in std_logic;
RESET: in std_logic;
ROW: out std_logic_vector(0 to 7);
LED: out std_logic_vector(0 to 7)
);
end ledc8x8;
architecture behavioral of ledc8x8 is
signal count: std_logic_vector(7 downto 0) := (others => '0'); -- hlavni citac
signal row_count: std_logic_vector(7 downto 0) := "10000000"; -- prepinac radku
signal clock_en: std_logic; -- CE
signal output_logic: std_logic_vector(7 downto 0); -- "vystup"
begin
process(count, SMCLK, RESET, clock_en)
begin
if RESET = '1' then
count <= (others => '0');
elsif SMCLK = '1' and SMCLK'event then
count <= count + 1;
end if;
if count="11111110" then
clock_en <= '1'; else
clock_en <= '0';
end if ;
end process;
process(clock_en, RESET)
begin
if RESET = '1' then
row_count <= "10000000";
elsif clock_en = '1' and clock_en'event then
row_count <= row_count(0) & row_count(7 downto 1);
end if;
end process;
process(row_count)
begin
case row_count is
when "00000001" => output_logic <= "11110110";
-- more switch options
end case;
end process;
ROW <= row_count;
LED <= output_logic;
end behavioral;
答案 0 :(得分:2)
您的代码有几个问题。
正如您在答案中发现的那样,您使用时钟启用作为时钟。我建议你这样写,但是:
process(RESET, SMCLK)
begin
if RESET = '1' then
row_count <= "10000000";
elsif SMCLK = '1' and SMCLK'event then
if clock_en = '1' then
row_count <= row_count(0) & row_count(7 downto 1);
end if;
end if;
end process;
它可能以相反的方式工作(可能),但是将启用检查与上升沿检查放在同一行上并不常见。另请注意,这意味着您在敏感度列表中不需要clock_en
。
您的其他时钟进程也应该重写。假设你希望clock_en
的任务是组合,你应该把它放在一个单独的过程中:
process(RESET, SMCLK)
begin
if RESET = '1' then
count <= (others => '0');
elsif SMCLK = '1' and SMCLK'event then
count <= count + 1;
end if;
end process;
process (count)
begin
if count="11111110" then
clock_en <= '1';
else
clock_en <= '0';
end if ;
end process;
你也可以在这里写第二个进程作为一行并发语句:
clock_en <= '1' when count = "11111110" else '0';
出于各种原因,在同一过程中组合独立的时钟和非时钟代码不是推荐的编码风格。
答案 1 :(得分:1)
具有clock_en&#39;事件的行 - 要求上升沿确实存在问题。替换为要求SMCLK信号的上升沿。
process(RESET, SMCLK)
begin
if RESET = '1' then
row_count <= "10000000";
elsif clock_en = '1' and SMCLK = '1' and SMCLK'event then
row_count <= row_count(0) & row_count(7 downto 1);
end if;
end if;
end process;