Question

我试图通过简单地计数普通代码然后将其转换为格雷代码来使格雷代码成为计数器。

我收到此错误

Line 52: Indexed name is not a std_logic_vector

即使我将该信号声明为std_logic_vector。

GrayCount <= count(3) & count(3) xor count(2) & count(2) xor count (1) & count (1) xor count(0);

这是52行。

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity GrayCounter is
     Port ( clock : in  STD_LOGIC;
              ud : in  STD_LOGIC;
              freq_sel : in  STD_LOGIC_VECTOR (1 downto 0);
              GrayCount : out  std_logic_vector (3 downto 0));
end GrayCounter;

architecture Behavioral of GrayCounter is
    signal count : std_logic_vector(3 downto 0);
    signal hz : integer range 0 to 100000000;
    signal clk  : std_logic;
begin
    process(clock)
    begin 
        case freq_sel is
            when "00" => hz <= 2000000;  
            when "01" => hz <= 4000000;
            when "10" => hz <= 10000000;
            when others => hz <= 100000000;
        end case;
    end process;

    process(clock)
    variable temp : integer range 0 to 100000000;
    begin
        if(clock'event and clock = '1') then
            temp := temp + 1;
            if (temp>(hz/2)) then 
                clk <= not clk;
                temp := 0;
            end if;
        end if;
    end process;

    process(clk)
    begin
        if(clk'event and clk = '1') then
            if(ud = '1') then
                count <= count + 1;
            else
                count <= count - 1 ;
            end if;
        end if;
    end process;

    GrayCount <= count(3) & count(3) xor count(2) & count(2) xor count (1) & count (1) xor count(0);

end Behavioral;

Answer 1

运算符优先级不是您可能期望的。

您应该添加方括号：

GrayCount  <= count(3) & (count(3) xor count(2)) & (count(2) xor count (1)) & (count (1) xor count(0));

如何修复我的代码中的“索引名称不是std_logic_vector”错误

1 个答案: