Question

我正在为openRISC 1200编写一个测试平台。我只是实例化了topmodule并为它创建了DUT。通过topmodule实例，我沿着层次结构向下指定一个值到我想要的变量。我运行我的tcl脚本，波形中唯一的输出是topmodule中的变量，而不是我指定值的变量。我使用force / release来添加值，这是因为我得到了一个net object错误。

initial begin
    @(posedge clk)
    force TOP_LEVEL.or1200_cpu.or1200_rf.rf_a.ce_w = 1'b0;  //Chip enable input 
    #500 
    release TOP_LEVEL.or1200_cpu.or1200_rf.rf_a.ce_w;
end

如果我为保存我需要的变量的模块创建实例化和DUT并运行tcl脚本，我能够看到波形中的输出。

我使用的tcl脚本：

set library_list {
    design_library {        
        //Here I have all the modules of the openRISC 1200, which are almost 70 files.
    }

    test_library {
        W:/--(o)---HH---(o)--/Master\ Thesis/WorkStation/OrpsocV2/testbenchOR.v     
    }
}
set top_level  test_library.testbenchOR 

set application_list {
}

set wave_patterns {
                           /*
}
set wave_radices {
                           hexadecimal {data q}
}

proc r  {} {uplevel #0 source New_openRISC.tcl} 
proc rr {} {global last_compile_time
            set last_compile_time 0
            r                            }
proc q  {} {quit -force                  }

set tk_ok 1
if [catch {package require Tk}] {set tk_ok 0}

# Prefer a fixed point font for the transcript
set PrefMain(font) {Courier 10 roman normal}

# Compile out of date files
set time_now [clock seconds]
if [catch {set last_compile_time}] {
  set last_compile_time 0
}
foreach {library file_list} $library_list {
  vlib $library
  vmap work $library
  foreach file $file_list {
    if { $last_compile_time < [file mtime $file] } {
      if [regexp {.vhdl?$} $file] {
        vcom -93 $file
      } else {
        vlog $file
      }
      set last_compile_time 0
    }
  }
}
set last_compile_time $time_now

# Load the simulation
eval vsim -voptargs=+acc -L design_library $top_level

# If waves are required
if [llength $wave_patterns] {
  noview wave
  foreach pattern $wave_patterns {
    add wave $pattern
  }
  configure wave -signalnamewidth 1
  foreach {radix signals} $wave_radices {
    foreach signal $signals {
      catch {property wave -radix $radix $signal}
    }
  }
  if $tk_ok {
    set waveWinName [view wave -dock]
    set waveTopLevel [winfo toplevel $waveWinName]
  }
}

view transcript
run -all

puts {
  Script commands are:

  r = Recompile changed and dependent files
 rr = Recompile everything
  q = Quit without confirmation
}

# How long since project began?
if {[file isfile start_time.txt] == 0} {
  set f [open start_time.txt w]
  puts $f "Start time was [clock seconds]"
  close $f
} else {
  set f [open start_time.txt r]
  set line [gets $f]
  close $f
  regexp {\d+} $line start_time
  set total_time [expr ([clock seconds]-$start_time)/60]
  #puts "Project time is $total_time minutes"
}

有没有人使用强制/释放有类似的问题，如果有，你是如何解决的？

ModelSim：使用强制/释放时看不到波形输出

0 个答案: